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Lyles College of Engineering

Hayssam El-Razouk

Associate Professor

Electrical & Computer Engineering | 559.278.2094 | Office: EE266

helrazouk@mail.fresnostate.edu

Education

PhD in Electrical and Computer Engineering, 2015
Western University
London, Ontario
Canada

Courses Taught

  • ECE 71.         Introduction to Computational Programming
  • ECE 81.         Computer Algorithms and Data Structures
  • ECE 85.         Digital Logic Design
  • ECE 91.         Introduction to Electrical Engineering
  • ECE 106.       Switching Theory and Logical Design
  • ECE 141.       Algorithmic Computations
  • ECE 156.       Fundamentals of Cryptography and Computer Network Security
  • ECE 174.       Advanced Computer Architecture
  • ECE 186A/B. Senior Design
  • ECE 244.       Advanced Hardware Design of Computer Arithmetic
Hayssam El-Razouk received the BEng degree from Beirut Arab University in 2002 with the first rank, and, the MESc and PhD degrees from the University of Western Ontario in 2006 and 2015, respectively, all in electrical and computer engineering. During PhD studies, he was a recipient of the prestigious Natural Sciences and Engineering Research Council of Canada (NSERC) Alexander Graham Bell Canada Graduate Scholarships-Doctoral (CGSD scholarship, September 2012 to August 2015). From 2006 to 2011, he was a software engineer with RedIron Technologies, London, Ontario, Canada. Hayssam El-Razouk was a research scientist with IBM Canada between October 2015 and August 2016. He was a Postdoc with the Electrical and Computer Engineering Department at Western University, London, Ontario, Canada between Sep. 1 2016 and Jan 10 2017. Currently, Hayssam El-Razouk is an Associate Professor with the Electrical and Computer Engineering Department at California State University in Fresno. Hayssam El-Razouk research interests include digital VLSI circuits design, defect tolerance in VLSI digital circuits, finite fields and cryptographic hardware, hardware and embedded systems security, data compression, and pseudo random sequences. Hayssam El-Razouk is a member with IEEE and ASEE.
  • Cryptographic Hardware
  • Hardware/Embedded Security
  • Computer Arithmetic
  • VLSI Digital Circuits
Scholarships and Grants:
  • Apr. 2021 U.S. Department of Defense New Grant W911NF-21-1-0210, California State University, Fresno, Fresno, CA, USA. Total funding amount of $378,002.00 US dollars.
  • Sep. 2011–Aug. 2015 Natural Sciences and Engineering Research Council (NSERC) Canada Graduate Scholarship-Doctoral (CGS-D) Scholarship - PhD studies, Western University, London, Ontario, Canada. Total funding amount of $105,000 Canadian dollars.

Awards:
  • Mar. 2023 Best Presenter Award, IEEE CCWC 2023 (Virtual).
  • Jan. 2021 Best Paper Award, IEEE CCWC 2021 (Virtual).
  • May. 2020 Outstanding Faculty Publication Award, California State University, Fresno, CA, USA.
  • May. 2019 Outstanding Faculty Publication Award, California State University, Fresno, CA, USA.
  • Jun. 2002 Jamal Abdul Nassir Golden Medal Distinction Award, Beirut Arab University, Beirut, Lebanon.
Peer Reviewed Journals:
  1. M. Puligunta and H. El-Razouk, "Squeezing Area of the Versatile GF (2m) GNB Arithmetic Operators," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 6, pp. 2425-2438, June 2023.
  2. H. El-Razouk, "Input-Latency Free Versatile Bit-Serial GF(2m) Polynomial Basis Multiplication," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 30, no. 5, pp. 589-602, May 2022.
  3. H. El-Razouk, K. Kotha and M. Puligunta, "Novel GF(2m) Digit-Serial PISO Multipliers for the Self-Dual Gaussian Normal Bases," IEEE Trans. Comput., vol. 70, no. 10, pp. 1732-1746, 1 Oct. 2021.
  4. A. Reyhani-Masoleh, H. El-Razouk and A. Monfared, "New Multiplicative Inverse Architectures Using Gaussian Normal Basis," IEEE Trans. Comput., vol. 68, no. 7, pp. 991-1006, 1 Jul. 2019.
  5. H. El-Razouk and A. Reyhani-Masoleh, "New Architectures for Digit-Level Single, Hybrid-Double, Hybrid-Triple Field Multiplications and Exponentiation Using Gaussian Normal Bases," IEEE Trans. Comput., vol. 65, no. 8, pp. 2495–2509, Aug. 2016.
  6. H. El-Razouk, A. Reyhani-Masoleh, and G. Gong, "New Hardware Implementations of WG(29,11) and WG-16 Stream Ciphers Using Polynomial Basis," IEEE Trans. Comput., vol. 64, no. 7, pp. 2020–2035, Aug. 2015.
  7. H. El-Razouk, A. Reyhani-Masoleh, and G. Gong, "New Implementations of the WG Stream Cipher," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 22, no. 9, pp. 1865–1878, Sep. 2014.
  8. Z. Abid, H. El-Razouk and D. A. El-Dib, "Low power multipliers based on new hybrid full adders," Microelectronics Journal-Elsevier, V. 39, No. 12, pp. 1509-1515, 2008.
  9. Z. Abid and H. El-Razouk, "Defect Tolerant Voter Designs Based on Transistor Redundancy", Journal of Low Power Electronics, American Scientific Publishers, V.2, N.3, pp. 456-463, Dec. 2006.
Peer Reviewed Conferences:
  1. A. Cabrera, A. Rider, J. Xiong and H. El-Razouk, "Implementing Privacy on Public Digital Displays Using Smart Glasses," 2023 IEEE 13th Annual Computing and Communication Workshop and Conference (CCWC), Las Vegas, NV, USA, 2023, pp. 274-279.
  2. K. Marshall, T. Cantido, J. Case, L. Nguyen and H. El-Razouk, "An Event-Driven Authentication Approach for Mediation of User Actions," 2021 IEEE 12th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON), 2021, pp. 0534-0540.
  3. M. Puligunta and H. El-Razouk, "Performance Analysis of Gaussian Normal Basis GF ($2^{m}$) Serial Multipliers and Inverters," 2021 IEEE 11th Annual Computing and Communication Workshop and Conference (CCWC), 2021, pp. 0738-0746.
  4. S. Paramasivam Karthikeyan and H. El-Razouk, "Horizontal Correlation Analysis of Elliptic Curve Diffie Hellman," 2020 3rd International Conference on Information and Computer Technologies (ICICT), San Jose, CA, USA, 2020, pp. 511-519.
  5. H. El-Razouk, “Novel Trace-Based Construction of the Parallel-In-Serial-Out Multiplication for Elliptic Curve Digital Signature Algorithm Like Binary Extension Fields,” IEEE 9th Annual Computing and Communication Workshop and Conference (CCWC 2019), Las Vegas, NV, USA, 2019, pp. 0955–0961.
  6. A. Monfared, H. El-Razouk, and A. Reyhani-Masoleh, “A New Multiplicative Inverse Architecture in Normal Basis Using Novel Concurrent Serial Squaring and Multiplication”, 24th IEEE Symposium on Computer Arithmetic (ARITH 24), pp. 164–171, July 2017.
  7. Hayssam El-Razouk and Arash Reyhani-Masoleh, “New Bit-Level Serial GF(2m) Multiplication Using Polynomial Basis”, 22nd IEEE Symposium on Computer Arithmetic (ARITH 22), pp. 129 - 136, 2015.
  8. Hayssam El-Razouk and Z. Abid, “Area and Power Efficient Array and Tree Multipliers”, IEEE Annual Canadian Conference on Electrical and Computer Engineering (CCECE 06), pp. 713 - 716, May 2006.
  9. Hayssam El-Razouk and Z. Abid, “A new Transistor-Redundant Voter for defect-tolerant digital circuits”, IEEE Annual Canadian Conference on Electrical and Computer Engineering (CCECE 06), pp. 1078-1081, May 2006.
  10. Rizwan Mudassir, H. El-Razouk and Z. Abid, “New Designs of Signed Multipliers,” IEEE-NEWCAS 3rd International Conference, Quebec, Canada, pp. 366-364, June 2005.
  11. Rizwan Mudassir, H. El-Razouk, Z. Abid and Wei Wang, “New Designs of 14-transistors PPM Adder,” Proceedings of CCECE Conference, Saskatoon, pp. 1739-1742, May 2005.